Stamp9261 -> D/A converter

What's the best way to drive a D/A converter with the Stamp9261?

I would like to drive a dual-channel D/A converter with 8 bit resolution per channel. My idea is to use 16 GPIOs for that purpose. How fast can I possibly get with this solution?

Is there anything one has to take care of when choosing the GPIOs? For example: Should they all be chosen from one PIO controller (A, B or C) to be able to set the values faster or easier when it comes to programming?

Are there other/better ways to do it, especially if one wants to have the best performance possible (=deliver as much samples per second to the DAC as possible)? How many samples per second should be approximately feasible in these cases?

Thanks!

Re: Stamp9261 -> D/A converter

You should choose the GPIO's one one channel to be on one PIO-Controller, as they can be accessed synchronously. That requires to enable the pins of the relevant PIO-Controller for synchronous output in the ODER register, then the ODSR register is write able for that pins.

The question regarding the sample rate depends very much on what you want tod and where you want to do it. Do you intend to write a kernel driver or do you want to access the pins in user-space? In both cases the sample rate is as fast as your code writes so to say. Maybe you can provide a little bit more information on how you want to access the pins and what sample rate you intend to reach.

Re: Stamp9261 -> D/A converter

I would like to go to the limits and achieve some 10 Msamples per second.

As for now I'm not familiar with the operating system coming with the stamp and its possibilities as the pcb design for my project is still in progress.

My idea so far is to write a C program that generates samples and passes them through to the pins and thus to the D/A converter (AD9709) which is directly connected to the pins.

Thanks for any further information!

Re: Stamp9261 -> D/A converter

You need 4 clock cycles (bus clock 100 MHz) to push your value to be an actual level on the pin. That makes a maxium sample rate of 25 MHz.
That means you would have 8 clock cycles to implement your application and you would need at least two of them to write your data to the register.
If you want a sample rate of 10MHz you have 20 clock cycles (CPU clock 200 MHz) to implement your application.
The Stamp is delivered with Linux as operating system. It goes without saying, that Linux is totally not suitable for this kind of requirement, as you have no control when you get hold of CPU.
IMHO, sample rates like this can only be achieved with a stand alone program.

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